Example embodiments relate generally to semiconductor integrated circuits. For example, at least some example embodiments relate to a stacked memory chip having a reduced input-output load, a memory module and/or a memory system including the stacked memory chip.
Due to developments in hardware and software, there may be increased demand for main memory having increased capacity and/or operating speed. To increase the memory capacity, semiconductor dies or semiconductor chips may be stacked in a package of a memory chip. The memory chip includes input-output pads for exchanging signals with an external device. Conventionally, the stacked semiconductor dies may be commonly connected to the input-output pads and one of the semiconductor dies may be selected and accessed based on chip selection signals. As the number of the semiconductor dies commonly connected to the input-output pads increases, the load of the input-output lines may also increase. The increased load may limit the operation speed of the memory chip and may increase the input-output power.